diff --git a/src/dynarmic/src/dynarmic/backend/x64/emit_x64_floating_point.cpp b/src/dynarmic/src/dynarmic/backend/x64/emit_x64_floating_point.cpp
index 827600c7c2..756a6f0a36 100644
--- a/src/dynarmic/src/dynarmic/backend/x64/emit_x64_floating_point.cpp
+++ b/src/dynarmic/src/dynarmic/backend/x64/emit_x64_floating_point.cpp
@@ -1532,7 +1532,7 @@ void EmitX64::EmitFPSingleToHalf(EmitContext& ctx, IR::Inst* inst) {
         if (ctx.FPCR().DN()) {
             ForceToDefaultNaN<32>(code, result);
         }
-        code.vcvtps2ph(result, result, static_cast<u8>(*round_imm));
+        code.vcvtps2ph(result, result, u8(*round_imm));
 
         ctx.reg_alloc.DefineValue(code, inst, result);
         return;
@@ -1540,7 +1540,7 @@ void EmitX64::EmitFPSingleToHalf(EmitContext& ctx, IR::Inst* inst) {
 
     ctx.reg_alloc.HostCall(code, inst, args[0]);
     code.mov(code.ABI_PARAM2.cvt32(), ctx.FPCR().Value());
-    code.mov(code.ABI_PARAM3.cvt32(), static_cast<u32>(rounding_mode));
+    code.mov(code.ABI_PARAM3.cvt32(), u32(rounding_mode));
     code.lea(code.ABI_PARAM4, code.ptr[code.ABI_JIT_PTR + code.GetJitStateInfo().offsetof_fpsr_exc]);
     code.CallFunction(&FP::FPConvert<u16, u32>);
 }
diff --git a/src/dynarmic/src/dynarmic/backend/x64/emit_x64_vector_floating_point.cpp b/src/dynarmic/src/dynarmic/backend/x64/emit_x64_vector_floating_point.cpp
index c6c9dfddcd..68ffb2475b 100644
--- a/src/dynarmic/src/dynarmic/backend/x64/emit_x64_vector_floating_point.cpp
+++ b/src/dynarmic/src/dynarmic/backend/x64/emit_x64_vector_floating_point.cpp
@@ -1657,11 +1657,10 @@ void EmitFPVectorRoundInt(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) {
 
     if constexpr (fsize != 16) {
         if (code.HasHostFeature(HostFeature::SSE41) && rounding != FP::RoundingMode::ToNearest_TieAwayFromZero && !exact) {
-            const u8 round_imm = ConvertRoundingModeToX64Immediate(rounding);
+            const auto round_imm = ConvertRoundingModeToX64Immediate(rounding);
             EmitTwoOpVectorOperation<fsize, DefaultIndexer, 3>(code, ctx, inst, [&](const Xbyak::Xmm& result, const Xbyak::Xmm& xmm_a) {
-                FCODE(roundp)(result, xmm_a, round_imm);
+                FCODE(roundp)(result, xmm_a, *round_imm);
             });
-
             return;
         }
     }
@@ -1993,7 +1992,7 @@ void EmitFPVectorToFixed(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) {
         auto args = ctx.reg_alloc.GetArgumentInfo(inst);
         const Xbyak::Xmm src = ctx.reg_alloc.UseScratchXmm(code, args[0]);
         MaybeStandardFPSCRValue(code, ctx, fpcr_controlled, [&] {
-            const int round_imm = ConvertRoundingModeToX64Immediate(rounding);
+            const auto round_imm = ConvertRoundingModeToX64Immediate(rounding);
             const auto perform_conversion = [&code, &ctx](const Xbyak::Xmm& src) {
                 // MSVC doesn't allow us to use a [&] capture, so we have to do this instead.
                 (void)ctx;
@@ -2025,7 +2024,7 @@ void EmitFPVectorToFixed(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) {
                 FCODE(mulp)(src, GetVectorOf<fsize>(code, scale_factor));
             }
 
-            FCODE(roundp)(src, src, u8(round_imm));
+            FCODE(roundp)(src, src, u8(*round_imm));
             const Xbyak::Xmm nan_mask = xmm0;
             if (code.HasHostFeature(HostFeature::AVX512_OrthoFloat)) {
                 static constexpr u32 nan_to_zero = FixupLUT(FpFixup::PosZero, FpFixup::PosZero);