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fixup?
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parent
365c34b241
commit
45ae91fca0
6 changed files with 16 additions and 18 deletions
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@ -326,7 +326,7 @@ std::pair<VkBuffer, VkDeviceSize> Uint8Pass::Assemble(u32 num_vertices, VkBuffer
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const u32 staging_size = static_cast<u32>(num_vertices * sizeof(u16));
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const auto staging = staging_buffer_pool.Request(staging_size, MemoryUsage::DeviceLocal);
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compute_pass_descriptor_queue.Acquire();
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compute_pass_descriptor_queue.Acquire(scheduler);
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compute_pass_descriptor_queue.AddBuffer(src_buffer, src_offset, num_vertices);
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compute_pass_descriptor_queue.AddBuffer(staging.buffer, staging.offset, staging_size);
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const void* const descriptor_data{compute_pass_descriptor_queue.UpdateData()};
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@ -384,7 +384,7 @@ std::pair<VkBuffer, VkDeviceSize> QuadIndexedPass::Assemble(
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const std::size_t staging_size = num_tri_vertices * sizeof(u32);
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const auto staging = staging_buffer_pool.Request(staging_size, MemoryUsage::DeviceLocal);
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compute_pass_descriptor_queue.Acquire();
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compute_pass_descriptor_queue.Acquire(scheduler);
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compute_pass_descriptor_queue.AddBuffer(src_buffer, src_offset, input_size);
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compute_pass_descriptor_queue.AddBuffer(staging.buffer, staging.offset, staging_size);
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const void* const descriptor_data{compute_pass_descriptor_queue.UpdateData()};
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@ -429,7 +429,7 @@ void ConditionalRenderingResolvePass::Resolve(VkBuffer dst_buffer, VkBuffer src_
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}
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const size_t compare_size = compare_to_zero ? 8 : 24;
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compute_pass_descriptor_queue.Acquire();
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compute_pass_descriptor_queue.Acquire(scheduler);
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compute_pass_descriptor_queue.AddBuffer(src_buffer, src_offset, compare_size);
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compute_pass_descriptor_queue.AddBuffer(dst_buffer, 0, sizeof(u32));
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const void* const descriptor_data{compute_pass_descriptor_queue.UpdateData()};
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@ -498,7 +498,7 @@ void QueriesPrefixScanPass::Run(VkBuffer accumulation_buffer, VkBuffer dst_buffe
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static constexpr size_t DISPATCH_SIZE = 2048U;
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size_t runs_to_do = std::min<size_t>(current_runs, DISPATCH_SIZE);
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current_runs -= runs_to_do;
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compute_pass_descriptor_queue.Acquire();
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compute_pass_descriptor_queue.Acquire(scheduler);
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compute_pass_descriptor_queue.AddBuffer(src_buffer, 0, number_of_sums * sizeof(u64));
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compute_pass_descriptor_queue.AddBuffer(dst_buffer, 0, number_of_sums * sizeof(u64));
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compute_pass_descriptor_queue.AddBuffer(accumulation_buffer, 0, sizeof(u64));
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@ -600,7 +600,7 @@ void ASTCDecoderPass::Assemble(Image& image, const StagingBufferRef& map,
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const u32 num_dispatches_y = Common::DivCeil(swizzle.num_tiles.height, 8U);
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const u32 num_dispatches_z = image.info.resources.layers;
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compute_pass_descriptor_queue.Acquire();
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compute_pass_descriptor_queue.Acquire(scheduler);
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compute_pass_descriptor_queue.AddBuffer(map.buffer, input_offset,
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image.guest_size_bytes - swizzle.buffer_offset);
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compute_pass_descriptor_queue.AddImage(image.StorageImageView(swizzle.level));
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@ -821,7 +821,7 @@ void BlockLinearUnswizzle3DPass::UnswizzleChunk(
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pc.blocks_dim[1] = blocks_y;
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pc.blocks_dim[2] = z_count; // Only process the count
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compute_pass_descriptor_queue.Acquire();
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compute_pass_descriptor_queue.Acquire(scheduler);
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compute_pass_descriptor_queue.AddBuffer(*image.runtime->swizzle_table_buffer, 0,
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image.runtime->swizzle_table_size);
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compute_pass_descriptor_queue.AddBuffer(swizzled.buffer,
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@ -989,7 +989,7 @@ void MSAACopyPass::CopyImage(Image& dst_image, Image& src_image,
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ASSERT(copy.dst_subresource.base_layer == 0);
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ASSERT(copy.dst_subresource.num_layers == 1);
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compute_pass_descriptor_queue.Acquire();
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compute_pass_descriptor_queue.Acquire(scheduler);
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compute_pass_descriptor_queue.AddImage(
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src_image.StorageImageView(copy.src_subresource.base_level));
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compute_pass_descriptor_queue.AddImage(
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@ -113,7 +113,7 @@ ComputePipeline::ComputePipeline(const Device& device_, Scheduler& scheduler, vk
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void ComputePipeline::Configure(Tegra::Engines::KeplerCompute& kepler_compute,
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Tegra::MemoryManager& gpu_memory, Scheduler& scheduler,
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BufferCache& buffer_cache, TextureCache& texture_cache) {
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guest_descriptor_queue.Acquire();
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guest_descriptor_queue.Acquire(scheduler);
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buffer_cache.SetComputeUniformBufferState(info.constant_buffer_mask, &uniform_buffer_sizes);
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buffer_cache.UnbindComputeStorageBuffers();
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@ -473,7 +473,7 @@ bool GraphicsPipeline::ConfigureImpl(bool is_indexed) {
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buffer_cache.UpdateGraphicsBuffers(is_indexed);
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buffer_cache.BindHostGeometryBuffers(is_indexed);
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guest_descriptor_queue.Acquire();
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guest_descriptor_queue.Acquire(scheduler);
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RescalingPushConstant rescaling;
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RenderAreaPushConstant render_area;
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@ -203,7 +203,7 @@ RasterizerVulkan::RasterizerVulkan(Core::Frontend::EmuWindow& emu_window_, Tegra
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: gpu{gpu_}, device_memory{device_memory_}, device{device_},
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memory_allocator{memory_allocator_}, state_tracker{state_tracker_}, scheduler{scheduler_},
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staging_pool(device, memory_allocator, scheduler), descriptor_pool(device, scheduler),
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guest_descriptor_queue(device, scheduler), compute_pass_descriptor_queue(device, scheduler),
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guest_descriptor_queue(device), compute_pass_descriptor_queue(device),
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blit_image(device, scheduler, state_tracker, descriptor_pool), render_pass_cache(device),
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texture_cache_runtime{
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device, scheduler, memory_allocator, staging_pool,
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@ -15,8 +15,9 @@
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namespace Vulkan {
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UpdateDescriptorQueue::UpdateDescriptorQueue(const Device& device_, Scheduler& scheduler_)
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: device{device_}, scheduler{scheduler_} {
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UpdateDescriptorQueue::UpdateDescriptorQueue(const Device& device_)
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: device{device_}
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{
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payload_start = payload.data();
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payload_cursor = payload.data();
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}
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@ -31,7 +32,7 @@ void UpdateDescriptorQueue::TickFrame() {
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payload_cursor = payload_start;
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}
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void UpdateDescriptorQueue::Acquire() {
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void UpdateDescriptorQueue::Acquire(Scheduler& scheduler) {
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// Minimum number of entries required.
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// This is the maximum number of entries a single draw call might use.
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static constexpr size_t MIN_ENTRIES = 0x400;
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@ -34,12 +34,11 @@ class UpdateDescriptorQueue final {
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static constexpr size_t PAYLOAD_SIZE = FRAME_PAYLOAD_SIZE * FRAMES_IN_FLIGHT;
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public:
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explicit UpdateDescriptorQueue(const Device& device_, Scheduler& scheduler_);
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explicit UpdateDescriptorQueue(const Device& device_);
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~UpdateDescriptorQueue();
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void TickFrame();
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void Acquire();
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void Acquire(Scheduler& scheduler);
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const DescriptorUpdateEntry* UpdateData() const noexcept {
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return upload_start;
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@ -75,8 +74,6 @@ public:
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private:
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const Device& device;
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Scheduler& scheduler;
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size_t frame_index{0};
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DescriptorUpdateEntry* payload_cursor = nullptr;
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DescriptorUpdateEntry* payload_start = nullptr;
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