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https://git.eden-emu.dev/eden-emu/eden.git
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more inline, device_
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parent
557e02c28e
commit
f144645660
9 changed files with 30 additions and 40 deletions
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@ -502,9 +502,9 @@ BlitImageHelper::BlitImageHelper(const Device& device_, Scheduler& scheduler_,
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two_textures_set_layout(device.GetLogical().CreateDescriptorSetLayout(
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TWO_TEXTURES_DESCRIPTOR_SET_LAYOUT_CREATE_INFO)),
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one_texture_descriptor_allocator{
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descriptor_pool.Allocator(*one_texture_set_layout, TEXTURE_DESCRIPTOR_BANK_INFO<1>)},
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descriptor_pool.Allocator(device_, scheduler_, *one_texture_set_layout, TEXTURE_DESCRIPTOR_BANK_INFO<1>)},
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two_textures_descriptor_allocator{
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descriptor_pool.Allocator(*two_textures_set_layout, TEXTURE_DESCRIPTOR_BANK_INFO<2>)},
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descriptor_pool.Allocator(device_, scheduler_, *two_textures_set_layout, TEXTURE_DESCRIPTOR_BANK_INFO<2>)},
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one_texture_pipeline_layout(device.GetLogical().CreatePipelineLayout(PipelineLayoutCreateInfo(
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one_texture_set_layout.address(),
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PUSH_CONSTANT_RANGE<VK_SHADER_STAGE_VERTEX_BIT, sizeof(PushConstants)>))),
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@ -234,7 +234,7 @@ struct ConditionalRenderingResolvePushConstants {
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};
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} // Anonymous namespace
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ComputePass::ComputePass(const Device& device_, DescriptorPool& descriptor_pool,
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ComputePass::ComputePass(const Device& device_, Scheduler& scheduler, DescriptorPool& descriptor_pool,
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vk::Span<VkDescriptorSetLayoutBinding> bindings,
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vk::Span<VkDescriptorUpdateTemplateEntry> templates,
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const DescriptorBankInfo& bank_info,
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@ -270,7 +270,7 @@ ComputePass::ComputePass(const Device& device_, DescriptorPool& descriptor_pool,
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.pipelineLayout = *layout,
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.set = 0,
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});
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descriptor_allocator = descriptor_pool.Allocator(*descriptor_set_layout, bank_info);
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descriptor_allocator = descriptor_pool.Allocator(device, scheduler, *descriptor_set_layout, bank_info);
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}
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if (code.empty()) {
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return;
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@ -313,7 +313,7 @@ ComputePass::~ComputePass() = default;
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Uint8Pass::Uint8Pass(const Device& device_, Scheduler& scheduler_, DescriptorPool& descriptor_pool,
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StagingBufferPool& staging_buffer_pool_,
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ComputePassDescriptorQueue& compute_pass_descriptor_queue_)
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: ComputePass(device_, descriptor_pool, INPUT_OUTPUT_DESCRIPTOR_SET_BINDINGS,
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: ComputePass(device_, scheduler_, descriptor_pool, INPUT_OUTPUT_DESCRIPTOR_SET_BINDINGS,
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INPUT_OUTPUT_DESCRIPTOR_UPDATE_TEMPLATE, INPUT_OUTPUT_BANK_INFO, {},
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VULKAN_UINT8_COMP_SPV),
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scheduler{scheduler_}, staging_buffer_pool{staging_buffer_pool_},
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@ -355,7 +355,7 @@ QuadIndexedPass::QuadIndexedPass(const Device& device_, Scheduler& scheduler_,
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DescriptorPool& descriptor_pool_,
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StagingBufferPool& staging_buffer_pool_,
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ComputePassDescriptorQueue& compute_pass_descriptor_queue_)
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: ComputePass(device_, descriptor_pool_, INPUT_OUTPUT_DESCRIPTOR_SET_BINDINGS,
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: ComputePass(device_, scheduler_, descriptor_pool_, INPUT_OUTPUT_DESCRIPTOR_SET_BINDINGS,
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INPUT_OUTPUT_DESCRIPTOR_UPDATE_TEMPLATE, INPUT_OUTPUT_BANK_INFO,
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COMPUTE_PUSH_CONSTANT_RANGE<sizeof(u32) * 3>, VULKAN_QUAD_INDEXED_COMP_SPV),
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scheduler{scheduler_}, staging_buffer_pool{staging_buffer_pool_},
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@ -416,7 +416,7 @@ std::pair<VkBuffer, VkDeviceSize> QuadIndexedPass::Assemble(
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ConditionalRenderingResolvePass::ConditionalRenderingResolvePass(
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const Device& device_, Scheduler& scheduler_, DescriptorPool& descriptor_pool_,
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ComputePassDescriptorQueue& compute_pass_descriptor_queue_)
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: ComputePass(device_, descriptor_pool_, INPUT_OUTPUT_DESCRIPTOR_SET_BINDINGS,
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: ComputePass(device_, scheduler_, descriptor_pool_, INPUT_OUTPUT_DESCRIPTOR_SET_BINDINGS,
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INPUT_OUTPUT_DESCRIPTOR_UPDATE_TEMPLATE, INPUT_OUTPUT_BANK_INFO,
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COMPUTE_PUSH_CONSTANT_RANGE<sizeof(ConditionalRenderingResolvePushConstants)>,
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RESOLVE_CONDITIONAL_RENDER_COMP_SPV),
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@ -470,7 +470,7 @@ QueriesPrefixScanPass::QueriesPrefixScanPass(
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const Device& device_, Scheduler& scheduler_, DescriptorPool& descriptor_pool_,
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ComputePassDescriptorQueue& compute_pass_descriptor_queue_)
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: ComputePass(
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device_, descriptor_pool_, QUERIES_SCAN_DESCRIPTOR_SET_BINDINGS,
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device_, scheduler_, descriptor_pool_, QUERIES_SCAN_DESCRIPTOR_SET_BINDINGS,
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QUERIES_SCAN_DESCRIPTOR_UPDATE_TEMPLATE, QUERIES_SCAN_BANK_INFO,
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COMPUTE_PUSH_CONSTANT_RANGE<sizeof(QueriesPrefixScanPushConstants)>,
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device_.IsSubgroupFeatureSupported(VK_SUBGROUP_FEATURE_BASIC_BIT) &&
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@ -547,7 +547,7 @@ ASTCDecoderPass::ASTCDecoderPass(const Device& device_, Scheduler& scheduler_,
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StagingBufferPool& staging_buffer_pool_,
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ComputePassDescriptorQueue& compute_pass_descriptor_queue_,
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MemoryAllocator& memory_allocator_)
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: ComputePass(device_, descriptor_pool_, ASTC_DESCRIPTOR_SET_BINDINGS,
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: ComputePass(device_, scheduler_, descriptor_pool_, ASTC_DESCRIPTOR_SET_BINDINGS,
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ASTC_PASS_DESCRIPTOR_UPDATE_TEMPLATE_ENTRY, ASTC_BANK_INFO,
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COMPUTE_PUSH_CONSTANT_RANGE<sizeof(AstcPushConstants)>, ASTC_DECODER_COMP_SPV),
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scheduler{scheduler_}, staging_buffer_pool{staging_buffer_pool_},
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@ -746,7 +746,7 @@ BlockLinearUnswizzle3DPass::BlockLinearUnswizzle3DPass(
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StagingBufferPool& staging_buffer_pool_,
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ComputePassDescriptorQueue& compute_pass_descriptor_queue_)
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: ComputePass(
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device_, descriptor_pool_,
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device_, scheduler_, descriptor_pool_,
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BL3D_DESCRIPTOR_SET_BINDINGS,
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BL3D_DESCRIPTOR_UPDATE_TEMPLATE_ENTRY,
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BL3D_BANK_INFO,
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@ -941,7 +941,7 @@ MSAACopyPass::MSAACopyPass(const Device& device_, Scheduler& scheduler_,
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DescriptorPool& descriptor_pool_,
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StagingBufferPool& staging_buffer_pool_,
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ComputePassDescriptorQueue& compute_pass_descriptor_queue_)
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: ComputePass(device_, descriptor_pool_, MSAA_DESCRIPTOR_SET_BINDINGS,
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: ComputePass(device_, scheduler_, descriptor_pool_, MSAA_DESCRIPTOR_SET_BINDINGS,
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MSAA_DESCRIPTOR_UPDATE_TEMPLATE, MSAA_BANK_INFO, {},
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CONVERT_NON_MSAA_TO_MSAA_COMP_SPV),
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scheduler{scheduler_}, staging_buffer_pool{staging_buffer_pool_},
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@ -35,7 +35,7 @@ struct StagingBufferRef;
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class ComputePass {
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public:
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explicit ComputePass(const Device& device, DescriptorPool& descriptor_pool,
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explicit ComputePass(const Device& device, Scheduler& scheduler, DescriptorPool& descriptor_pool,
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vk::Span<VkDescriptorSetLayoutBinding> bindings,
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vk::Span<VkDescriptorUpdateTemplateEntry> templates,
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const DescriptorBankInfo& bank_info,
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@ -30,7 +30,7 @@ using Shader::ImageBufferDescriptor;
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using Shader::Backend::SPIRV::RESCALING_LAYOUT_WORDS_OFFSET;
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using Tegra::Texture::TexturePair;
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ComputePipeline::ComputePipeline(const Device& device_, vk::PipelineCache& pipeline_cache_,
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ComputePipeline::ComputePipeline(const Device& device_, Scheduler& scheduler, vk::PipelineCache& pipeline_cache_,
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DescriptorPool& descriptor_pool,
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GuestDescriptorQueue& guest_descriptor_queue_,
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Common::ThreadWorker* thread_worker,
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@ -46,7 +46,7 @@ ComputePipeline::ComputePipeline(const Device& device_, vk::PipelineCache& pipel
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std::copy_n(info.constant_buffer_used_sizes.begin(), uniform_buffer_sizes.size(),
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uniform_buffer_sizes.begin());
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auto func{[this, &descriptor_pool, shader_notify, pipeline_statistics] {
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auto func{[this, &scheduler, &descriptor_pool, shader_notify, pipeline_statistics] {
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DescriptorLayoutBuilder builder{device};
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builder.Add(info, VK_SHADER_STAGE_COMPUTE_BIT);
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@ -56,7 +56,7 @@ ComputePipeline::ComputePipeline(const Device& device_, vk::PipelineCache& pipel
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descriptor_update_template =
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builder.CreateTemplate(*descriptor_set_layout, *pipeline_layout, uses_push_descriptor);
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if (!uses_push_descriptor) {
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descriptor_allocator = descriptor_pool.Allocator(*descriptor_set_layout, info);
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descriptor_allocator = descriptor_pool.Allocator(device, scheduler, *descriptor_set_layout, info);
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}
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const VkPipelineShaderStageRequiredSubgroupSizeCreateInfoEXT subgroup_size_ci{
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.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_REQUIRED_SUBGROUP_SIZE_CREATE_INFO_EXT,
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@ -31,7 +31,7 @@ class Scheduler;
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class ComputePipeline {
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public:
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explicit ComputePipeline(const Device& device, vk::PipelineCache& pipeline_cache,
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explicit ComputePipeline(const Device& device, Scheduler& scheduler, vk::PipelineCache& pipeline_cache,
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DescriptorPool& descriptor_pool,
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GuestDescriptorQueue& guest_descriptor_queue,
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Common::ThreadWorker* thread_worker,
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@ -125,27 +125,22 @@ vk::DescriptorSets DescriptorAllocator::AllocateDescriptors(size_t count) {
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throw vk::Exception(VK_ERROR_OUT_OF_POOL_MEMORY);
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}
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DescriptorPool::DescriptorPool(const Device& device_, Scheduler& scheduler)
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: device{device_}, master_semaphore{scheduler.GetMasterSemaphore()} {}
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DescriptorPool::DescriptorPool(const Device& device_, Scheduler& scheduler) {}
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DescriptorPool::~DescriptorPool() = default;
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DescriptorAllocator DescriptorPool::Allocator(VkDescriptorSetLayout layout,
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std::span<const Shader::Info> infos) {
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return Allocator(layout, MakeBankInfo(infos));
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DescriptorAllocator DescriptorPool::Allocator(const Device& device, Scheduler& scheduler, VkDescriptorSetLayout layout, std::span<const Shader::Info> infos) {
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return Allocator(device, scheduler, layout, MakeBankInfo(infos));
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}
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DescriptorAllocator DescriptorPool::Allocator(VkDescriptorSetLayout layout,
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const Shader::Info& info) {
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return Allocator(layout, MakeBankInfo(std::array{info}));
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DescriptorAllocator DescriptorPool::Allocator(const Device& device, Scheduler& scheduler, VkDescriptorSetLayout layout, const Shader::Info& info) {
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return Allocator(device, scheduler, layout, MakeBankInfo(std::array{info}));
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}
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DescriptorAllocator DescriptorPool::Allocator(VkDescriptorSetLayout layout,
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const DescriptorBankInfo& info) {
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return DescriptorAllocator(device, master_semaphore, Bank(info), layout);
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DescriptorAllocator DescriptorPool::Allocator(const Device& device, Scheduler& scheduler, VkDescriptorSetLayout layout, const DescriptorBankInfo& info) {
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return DescriptorAllocator(device, scheduler.GetMasterSemaphore(), Bank(device, info), layout);
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}
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DescriptorBank& DescriptorPool::Bank(const DescriptorBankInfo& reqs) {
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DescriptorBank& DescriptorPool::Bank(const Device& device, const DescriptorBankInfo& reqs) {
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std::shared_lock read_lock{banks_mutex};
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const auto it = std::ranges::find_if(bank_infos, [&reqs](const DescriptorBankInfo& bank) {
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return std::abs(bank.score - reqs.score) < SCORE_THRESHOLD && bank.IsSuperset(reqs);
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@ -68,17 +68,12 @@ public:
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DescriptorPool& operator=(const DescriptorPool&) = delete;
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DescriptorPool(const DescriptorPool&) = delete;
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DescriptorAllocator Allocator(VkDescriptorSetLayout layout,
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std::span<const Shader::Info> infos);
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DescriptorAllocator Allocator(VkDescriptorSetLayout layout, const Shader::Info& info);
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DescriptorAllocator Allocator(VkDescriptorSetLayout layout, const DescriptorBankInfo& info);
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DescriptorAllocator Allocator(const Device& device, Scheduler& scheduler, VkDescriptorSetLayout layout, std::span<const Shader::Info> infos);
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DescriptorAllocator Allocator(const Device& device, Scheduler& scheduler, VkDescriptorSetLayout layout, const Shader::Info& info);
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DescriptorAllocator Allocator(const Device& device, Scheduler& scheduler, VkDescriptorSetLayout layout, const DescriptorBankInfo& info);
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private:
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DescriptorBank& Bank(const DescriptorBankInfo& reqs);
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const Device& device;
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MasterSemaphore& master_semaphore;
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DescriptorBank& Bank(const Device& device, const DescriptorBankInfo& reqs);
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std::shared_mutex banks_mutex;
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std::vector<DescriptorBankInfo> bank_infos;
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std::vector<std::unique_ptr<DescriptorBank>> banks;
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@ -276,7 +276,7 @@ GraphicsPipeline::GraphicsPipeline(
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descriptor_set_layout = builder.CreateDescriptorSetLayout(uses_push_descriptor);
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if (!uses_push_descriptor) {
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descriptor_allocator = descriptor_pool.Allocator(*descriptor_set_layout, stage_infos);
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descriptor_allocator = descriptor_pool.Allocator(device, scheduler, *descriptor_set_layout, stage_infos);
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}
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const VkDescriptorSetLayout set_layout{*descriptor_set_layout};
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@ -915,7 +915,7 @@ std::unique_ptr<ComputePipeline> PipelineCache::CreateComputePipeline(
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spv_module.SetObjectNameEXT(name.c_str());
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}
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Common::ThreadWorker* const thread_worker{build_in_parallel ? &workers : nullptr};
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return std::make_unique<ComputePipeline>(device, vulkan_pipeline_cache, descriptor_pool,
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return std::make_unique<ComputePipeline>(device, scheduler, vulkan_pipeline_cache, descriptor_pool,
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guest_descriptor_queue, thread_worker, statistics,
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&shader_notify, program.info, std::move(spv_module));
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