Mat M
7c46c4325d
Merge pull request #3633 from ReinUsesLisp/clean-texdec
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shader/texture: Remove type mismatches management from shader decoder
2020-04-13 10:13:05 -04:00
Fernando Sahmkow
1b20368a0a
Merge pull request #3578 from ReinUsesLisp/vmnmx
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shader/video: Partially implement VMNMX
2020-04-12 10:44:03 -04:00
ReinUsesLisp
44e1a2c490
shader/video: Partially implement VMNMX
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Implements the common usages for VMNMX. Inputs with a different size
than 32 bits are not supported and sign mismatches aren't supported
either.
VMNMX works as follows:
It grabs Ra and Rb and applies a maximum/minimum on them (this is
defined by .MX), having in mind the input sign. This result can then be
saturated. After the intermediate result is calculated, it applies
another operation on it using Rc. These operations are merges,
accumulations or another min/max pass.
This instruction allows to implement with a more flexible approach GCN's
min3 and max3 instructions (for instance).
2020-04-12 00:34:42 -03:00
ReinUsesLisp
57a3007e29
shader/texture: Remove type mismatches management from shader decoder
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Since commit 9fce105f45
2020-04-10 00:57:32 -03:00
bunnei
85d89e0758
Merge pull request #3601 from ReinUsesLisp/some-shader-encodings
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video_core/shader: Add some instruction and S2R encodings
2020-04-09 00:17:39 -04:00
Rodrigo Locatti
43f13f7fa1
Merge pull request #3489 from namkazt/patch-2
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shader: implement SULD.D bits32/64
2020-04-07 16:21:09 -03:00
Nguyen Dac Nam
ca3161ee7e
address nit.
2020-04-07 18:29:30 +07:00
Nguyen Dac Nam
e2349b001e
Apply suggestions from code review
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Co-Authored-By: Rodrigo Locatti <reinuseslisp@airmail.cc>
2020-04-07 07:55:49 +07:00
namkazy
a18e88be44
shader_decode: SULD.D using std::pair instead of out parameter
2020-04-06 13:46:55 +07:00
namkazy
319f68c624
shader_decode: SULD.D avoid duplicate code block.
2020-04-06 13:34:06 +07:00
namkazy
a6e264cd58
shader_decode: SULD.D fix conversion error.
2020-04-06 13:26:58 +07:00
namkazy
ca16317add
shader_decode: SULD.D implement bits64 and reverse shader ir init method to removed shader stage.
2020-04-06 13:09:19 +07:00
Fernando Sahmkow
f6d6689b13
Merge pull request #3592 from ReinUsesLisp/ipa
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shader_decompiler: Remove FragCoord.w hack and change IPA implementation
2020-04-05 19:29:40 -04:00
namkazy
d61a333362
silent warning (conversion error)
2020-04-05 16:02:07 +07:00
namkazy
15366b7474
shader_decode: SULD.D -> SINT actually same as UNORM.
2020-04-05 15:18:42 +07:00
namkazy
615eecd94e
shader_decode: SULD.D fix decode SNORM component
2020-04-05 14:46:43 +07:00
namkazy
dbd8cf0304
clang-format
2020-04-05 12:57:50 +07:00
namkazy
c26cea4ad2
shader_decode: get sampler descriptor from registry.
2020-04-05 12:54:48 +07:00
namkazy
8990c9a814
tweaking.
2020-04-05 10:31:32 +07:00
namkazy
2799ef5f43
cleanup unuse params
2020-04-05 10:31:31 +07:00
namkazy
35995111c9
cleanup debug code.
2020-04-05 10:31:30 +07:00
namkazy
2f42b04ae5
reimplement get component type, uncomment mistaken code
2020-04-05 10:31:30 +07:00
namkazy
d4038bf4ae
remove disable optimize
2020-04-05 10:31:30 +07:00
namkazy
e4402955e4
[wip] reimplement SULD.D
2020-04-05 10:31:29 +07:00
Nguyen Dac Nam
731b0dbebc
clang-fix
2020-04-05 10:31:28 +07:00
Nguyen Dac Nam
4c3ddd9c99
shader: image - import PredCondition
2020-04-05 10:31:27 +07:00
Nguyen Dac Nam
9f407fad5e
shader: SULD.D bits32 implement more complexer method.
2020-04-05 10:31:27 +07:00
Nguyen Dac Nam
06fa4a3a41
shader: SULD.D import StoreType
2020-04-05 10:31:26 +07:00
Nguyen Dac Nam
94fecd1b68
shader: implement SULD.D bits32
2020-04-05 10:31:26 +07:00
ReinUsesLisp
bcca6c3fce
shader/other: Add error message for some S2R registers
2020-04-04 03:46:07 -03:00
ReinUsesLisp
2eef8d7249
shader_bytecode: Rename MOV_SYS to S2R
2020-04-04 03:37:51 -03:00
ReinUsesLisp
ab3a1db282
shader/memory: Silence no return value warning
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Silences a warning about control paths not all returning a value.
2020-04-02 03:34:27 -03:00
ReinUsesLisp
d66cae7bd5
shader_decompiler: Remove FragCoord.w hack and change IPA implementation
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Credits go to gdkchan and Ryujinx. The pull request used for this can
be found here: https://github.com/Ryujinx/Ryujinx/pull/1082
yuzu was already using the header for interpolation, but it was missing
the FragCoord.w multiplication described in the linked pull request.
This commit finally removes the FragCoord.w == 1.0f hack from the shader
decompiler.
While we are at it, this commit renames some enumerations to match
Nvidia's documentation (linked below) and fixes component declaration
order in the shader program header (z and w were swapped).
https://github.com/NVIDIA/open-gpu-doc/blob/master/Shader-Program-Header/Shader-Program-Header.html
2020-04-01 21:48:55 -03:00
Fernando Sahmkow
207bfbf720
Merge pull request #3561 from ReinUsesLisp/f2f-conversion
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shader/conversion: Fix F2F rounding operations with different sizes
2020-03-31 14:45:02 -04:00
Fernando Sahmkow
8a4af4f128
Merge pull request #3577 from ReinUsesLisp/lea
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shader/lea: Fix LEA implementation
2020-03-31 14:36:07 -04:00
Nguyen Dac Nam
e0add44428
clang-format
2020-03-31 08:08:06 +07:00
Nguyen Dac Nam
455a771f6c
shader_decode: fix by suggestion
2020-03-31 08:02:44 +07:00
namkazy
5961fe334c
clang-format
2020-03-30 20:46:21 +07:00
namkazy
fd7fb7c1b7
shader_decode: ATOM/ATOMS: add function to avoid code repetition
2020-03-30 18:47:50 +07:00
Nguyen Dac Nam
3809c15721
shader_decode: implement ATOM operation for S32 and U32
2020-03-30 17:44:48 +07:00
namkazy
93a5b51a1f
clang-format
2020-03-30 17:44:48 +07:00
Nguyen Dac Nam
e57c348d6e
shader_decode: implement ATOMS instr partial.
2020-03-30 17:44:46 +07:00
ReinUsesLisp
74b1f71109
shader/lea: Simplify generated LEA code
2020-03-28 03:55:04 -03:00
ReinUsesLisp
fda10c4b0b
shader/lea: Fix op_a and op_b usages
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They were swapped.
2020-03-27 18:37:20 -03:00
ReinUsesLisp
ca9309bc07
shader/lea: Remove const and use move when possible
2020-03-27 18:36:38 -03:00
ReinUsesLisp
82d53d445a
shader/conversion: Fix F2F rounding operations with different sizes
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Rounding operations only matter when the conversion size of source and
destination is the same, i.e. .F16.F16, .F32.F32 and .F64.F64.
When there is a mismatch (.F16.F32), these bits are used for IEEE
rounding, we don't emulate this because GLSL and SPIR-V don't support
configuring it per operation.
2020-03-26 01:58:49 -03:00
makigumo
4a1a5ea61e
xmad: fix clang build error
2020-03-23 00:09:31 +01:00
bunnei
4785b963c3
Merge pull request #3505 from namkazt/patch-8
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shader_decode: implement XMAD mode CSfu
2020-03-19 17:41:01 -04:00
Rodrigo Locatti
944d38efc8
Merge pull request #3502 from namkazt/patch-3
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shader_decode: Reimplement BFE instructions
2020-03-15 21:23:04 -03:00
Nguyen Dac Nam
2cd41ab020
clang-format
2020-03-14 10:07:40 +07:00
